Practical SI Workshop
Learn board level design techniques for high-speed memory, multi-gigabit links and power distribution systems. Use IBIS model and transmission line simulation tools to set design rules for layout. Use TDR, sampling oscilloscope and spectrum analyzer to extract simulation parameters for the design process and verify to the final board design. Learn practical techniques and methods to succeed at 300+ MHz memory interface designs and 5+ Gbps serial link designs.
Your benefit from taking this workshop is practical signal-integrity knowledge that you can use in your design work today and in the future. By thoroughly using these techniques, you can reduce the number of board spins required to finalize a product – at the same time improve quality and reduce project risk. In most cases, the number of prototype iterations can be reduced to 1 or 2.
Content
This workshop is based on Axcons own material, combining years of design work with high speed designs made possible only by close attention to signal integrity.
The lab exercises are actual design challenges similar to common current and future designs tasks for the modern design engineer today. By using the workshop format all participants get to spend most time with hands-on specific design tasks in small groups.
The workshop uses lab exercises interchanging with demonstrations using practical design techniques to show how common and future design tasks can be solved using tools like:
- IBIS / transmission line simulator (Cadence)
- TDR and High-Speed Sampling Oscilloscope (LeCroy)
- Spectrum Analyzer with tracking generator (Agilent)
- Dedicated spreadsheets for PDN design
There is no special emphasis on the actual brands of tools and equipment. The primary intention with the workshop is to use the tools and equipment as just that: tools that help the design and verification achiever better and more predictable results.
Time
One day 9:00 to 16:00.
Vendor Dependence
Low.
Pre-requisites
Basic understanding of transmission line theory, termination, power-distribution/bypass etc. This workshop is a recommended successor to courses like:
- Signal Integrity and Advanced Digital Design by Rolf V. Østergaard
- Signal Integrity and High Speed System Design by Lee Ritchey
What's Included
This is what you get, when you take this course:
- One full day of expert training (in English or local language if possible)
- Lab exercises (bring a USB stick to take the results home) on the provided pre-loaded training PC's (1-2 participants per PC).
- Binder with all training material in English.
- Coffee/the/water + fruit, pastries and a full lunch.
- Opportunity to network with industry colleagues.
Program
The workshop program interchanges between workshop format lab exercises with hands-on and class demonstrations:
- Simulate and design a dual data-rata high speed memory interface (case: Altera Stratix IV to Micron RLDRAM at 300+ MHz)
Tools: Cadence SigExplorer [Workshop] - TDR measurement of a high-speed differential signal path including connectors, vias and board traces (case: ATCA backplane)
Tools: LeCroy 18GHz/20ns TDR [Demo] - Use a simulation model to investigate a multi-gigabit path.
Simulate to see what matters? Vias? Trace length? Loss?
Tools: Cadence SigExplorer [Workshop] - Measurement of the signal eye. Examine corellation to the simulation results.
Tools: LeCroy 18GHz Sampling Scope, Altera S2 HS eval board. [Demo] - Design a power distribution system with minimum bypass capacitors for a low impedance from DC to GHz.
Tools: Excel [Workshop] - Verification measurement of the designed PDS.
Tools: Agilent spectrum analyzer with tracking generator. [Demo]
Instructor
Rolf V. Østergaard, M.Sc.EE. from Axcon conducts the workshop. Rolf is an experienced digital design engineer, who these days consults on signal-integrity issues for various companies. Over the last few years, Rolf have trained more than 200 engineers in signal-integrity and helped organize training events with signal-integrity expert Lee Ritchey.
Registration and more information
If you want to sign up please contact Axcon: Tel. +45 4822 9266 or email This e-mail address is being protected from spambots. You need JavaScript enabled to view it
Back to training schedule

Sign up:
- This e-mail address is being protected from spambots. You need JavaScript enabled to view it
More information:
- Rolf V. Ostergaard, CEO
This e-mail address is being protected from spambots. You need JavaScript enabled to view it | +45 4822 9266
Full course schedule

